[Buildroot] [PATCH 1/2] package/llvm: Support for RISC-V on the LLVM package

[Thomas Petazzoni]

On Sat, 23 Jul 2022 23:54:47 +0200
Abel Bernabeu <abel at x-silicon.com> wrote:

> The initial support for the LLVM package did not include RISC-V, and
> needed to be added.
> 
> There is a new configuration parameter added
> (BR2_PACKAGE_LLVM_TARGETS_TO_BUILD) for dealing with the fact that
> the LLVM target and the architecture have different naming for RISC-V.
> While the target for RISC-V is "RISCV" irrespective of the ISA being
> 32 or 64 bits, the architecture does contain the number of bits
> leading to "riscv32" and "riscv64".
> 
> For previously supported architectures the naming for target and
> architecture matched and thus this parameter had not been needed, but
> it is now needed for RISC-V.
> 
> Signed-off-by: Abel Bernabeu <abel at x-silicon.com>
> ---
>  package/llvm/Config.in | 10 ++++++++++
>  package/llvm/llvm.mk   |  2 +-
>  2 files changed, 11 insertions(+), 1 deletion(-)

I have simplified the RISCV quirk by moving it to the llvm.mk file:

# Build backend for target architecture. This include backends like
# AMDGPU. We need to special case RISCV.
ifneq ($(filter riscv%,$(LLVM_TARGET_ARCH)),)
LLVM_TARGETS_TO_BUILD = RISCV
else
LLVM_TARGETS_TO_BUILD = $(LLVM_TARGET_ARCH)
endif

Applied with this change, thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com